Senior Design Verification Engineer, SSG at Amazon

Puesto Senior Design Verification Engineer, SSG
Publicado 14 Apr 2026
Expirado 14 May 2026
Empresa Amazon
Ubicación Catalunya | ES
Tipo de Contrato Full Time

Descripción del Puesto:

Última información laboral de Amazon para la posición de Senior Design Verification Engineer, SSG. If the Senior Design Verification Engineer, SSG vacante en Catalunya coincide con tus calificaciones, envía tu solicitud o currículum directamente a través del portal actualizado de Jobkos.

Ten en cuenta que aplicar a un trabajo puede no ser siempre fácil, ya que los candidatos deben cumplir con ciertos requisitos establecidos por la empresa. Esperamos que esta oportunidad en Amazon para la posición de Senior Design Verification Engineer, SSG se ajuste a tu perfil profesional.

As a Senior Design Verification Engineer, you will contribute to exploring innovative hardware designs to enhance our devices. You will define verification methodology and implement test plans for advanced functional blocks while collaborating with cross-functional teams to develop world-class hardware devices. You will participate in the bringup of such blocks on Simulation and Emulation platforms. You will work closely with multi-disciplinary groups including Architecture, RTL Design, PD, Validation, Software and Product Design to architect and implement verification environments for complex functional blocks that enable development of world-class hardware devices.

Responsibilities
  • Architect and implement verification environments for complex functional blocks
  • Create and enhance verification environments using SystemVerilog and UVM
  • Develop comprehensive test plans through collaboration with design engineers, SW and architects
  • Implement coverage measures for stimulus and corner-case scenarios
  • Participate in test plan and coverage reviews
  • Drive complex RTL and TB debugs
  • Drive UPF based low power verification
  • Contribute to verification activities across simulation and emulation platforms
  • Work on creating the automation scripts to support DV methodologies
  • Create infrastructure to performs system level performance analysis
Basic Qualifications
  • Bachelor's degree in Electrical Engineering/Communications Engineering
  • Experience verifying at multiple levels of logic from IP blocks to SoCs to full system testing
  • Experience using multiple verification platforms: UVM test bench, FPGA, emulator, software environments, and system testing
  • Experience with test plan development, building the necessary test bench infrastructure, developing tests and verifying the design
  • Experience with industry standard tools and scripting languages (Python or Perl) for automation
  • 10+ years or more of practical semiconductor ASIC experience including owning end to end DV of major SOC blocks
  • Experience with RTL development environments
  • Proficiency in hardware description languages and verification methodologies
  • Understanding of object-oriented programming concepts
Preferred Qualifications
  • Master's degree or Ph.D. degree in Electrical Engineering or related field
  • Experience in system-level debugging
  • Knowledge of SoC architecture
  • Experience in oral and written communication
  • Experience with ARM and DSP instruction set architectures
  • Strong programming skills in SV, UVM and C
  • Knowledge of AMBA bus protocols
  • Experience with formal verification methods
  • Experience with Low power verification methods
  • Experience with Baremetal processor environments
  • Transaction level modelling expertise
  • Familiarity with industry standard I/O interfaces
  • FPGA and emulation platform knowledge

Amazon is an equal opportunity employer and does not discriminate on the basis of protected veteran status, disability, or other legally protected status.

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Información de la Vacante:

  • Empresa: Amazon
  • Puesto: Senior Design Verification Engineer, SSG
  • Lugar de Trabajo: Catalunya
  • País: ES

Cómo Enviar tu Postulación:

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